DAQ development for the strip tracker upgrade

The readout of the future ATLAS strip tracker requires high-speed readout with multiplexing of the data from the 13 modules into optical links at the level of each strip stave. The data from the front-end chips is combined at the module level by a Hybrid Controller Chip (HCC). All the HCCs on one side of a stave are connected to the End-Of-Stave (EOS) card, which holds the stave-level multiplexer chip, the Giga-Byte Transmitter (GBT), which in turn connects to the opto-electronic converters.

All the chips are being developed by the international ATLAS collaboration. Because of size and total power requirements we are driven to state-of-the-art chip fabrication processes (130nm) and important chips in the readout chain are not yet available.

At Oxford we are working on the DAQ software for the final staves. To allow for the operation with the complete readout chain we are developing emulators for chips which are not yet physically available. This involves writing firmware for FPGAs.

Strip DAQ development setup. From left: High-Speed interface board emulating the stave multiplexer and providing connection to the PC, FPGA board emulating 130nm front-end chip, custom-built interface board


Alan Barr